International Journal of Electronic Devices and Networking
  • Printed Journal
  • Refereed Journal
  • Peer Reviewed Journal

P-ISSN: 2708-4477, E-ISSN: 2708-4485

International Journal of Electronic Devices and Networking


2024, Vol. 5, Issue 1, Part A
Linear phase frequency detectors in low-voltage phase-locked loop designs


Author(s): Xin Feng and Si-Zhou Chen

Abstract: This review paper explores the role and design of Linear Phase Frequency Detectors (LPFDs) in low-voltage Phase-Locked Loop (PLL) circuits. It emphasizes the significance of LPFDs in maintaining the performance and reliability of PLLs, especially in modern electronic systems operating at reduced supply voltages. The paper discusses the principles of LPFD operation, design challenges, and strategies to optimize their performance in low-voltage environments. Additionally, it reviews recent advancements and practical applications of LPFDs in various fields.

Pages: 19-23 | Views: 254 | Downloads: 83

Download Full Article: Click Here

International Journal of Electronic Devices and Networking
How to cite this article:
Xin Feng, Si-Zhou Chen. Linear phase frequency detectors in low-voltage phase-locked loop designs. Int J Electron Devices Networking 2024;5(1):19-23.
International Journal of Electronic Devices and Networking
Call for book chapter